For a printed circuit board for an electronic apparatus, high-density mounting has advanced in which the number of electronic devices to be mounted increases, a printed circuit board is miniaturized, and so forth.
As the high-density mounting has thus advanced, paths of electric currents have become complicated, and thus, issues of impedance mismatching or crosstalk in wiring, or such, become likely to occur. Therefore, more advanced circuit design is required for such a high-density mounted printed circuit board.
For such a printed circuit board on which high-density mounting is carried out, degradation in signal characteristics in wiring may preferably be controlled. For this purpose, various methods have been carried out. For example, such a wiring structure that a solid pattern removed part is provided in a solid pattern for grounding or power supply, and signal characteristics may be improved, and such a printed circuit board that a width of a slit formed in a solid pattern for grounding or power supply is adjusted, and signal characteristics may be improved, or such, have been proposed.    [Patent Document 1] Japanese Laid-Open Patent Application No. 09-36504    [Patent Document 2] Japanese Laid-Open Patent Application No. 11-317572
In the above-described high-density mounting, an amount of work for designing a wiring structure in a printed circuit board becomes further greater, and the cost and time for the work become considerable. Therefore, for example, it may be difficult to calculate, for all the wiring, degradation degrees in signal characteristics during a design stage.
However, an apparatus that assist a designer to efficiently check degradation degrees in signal characteristics in wiring patterns, in wiring design of a high-density mounted printed circuit board has not been proposed.